bearsarebears
2008-12-17 12:27:49 UTC
Hi all,
I wish to do a nanosim fast spice simulation.
I am confused about how to do this.
I have the SPEF file, .mod file, the gate-level verilog netlist and a
test-bench.
Is it possible to use the test-bench directly or must I generate
a .vcd file and then convert the .vcd file to .vec file with the
vcd2vec command?
How do i set my power supply voltage etc?
Please help, I am totally lost!
I wish to do a nanosim fast spice simulation.
I am confused about how to do this.
I have the SPEF file, .mod file, the gate-level verilog netlist and a
test-bench.
Is it possible to use the test-bench directly or must I generate
a .vcd file and then convert the .vcd file to .vec file with the
vcd2vec command?
How do i set my power supply voltage etc?
Please help, I am totally lost!