Free synthesis tools

[Element Blue]

Hi,
Sometime back there was a question asked regarding free synthesis
tools.I have the same question.Are there free synthesis tools,even with
any restrictions/evaluation periods/licenses,etc. for students ?
Thanks a lot
Bye

[Chris Alexander]

Both Xilinx and Altera offer free synthesis tools for verilog and VHDL
with their webpack and web edition tools.

Icarus Verilog has a synthesis option I belive - that's an open source
verilog simulator. I've never used it but the project is very active,
I imagine it is use-able.

There are some academic open source tools available from UC Berkeley
if that is of interest - no verilog or VHDL though.

Chris

Post by Element Blue
Hi,
Sometime back there was a question asked regarding free synthesis
tools.I have the same question.Are there free synthesis tools,even with
any restrictions/evaluation periods/licenses,etc. for students ?
Thanks a lot
Bye

[Ashutosh Chakraborty]

Post by Chris Alexander
Both Xilinx and Altera offer free synthesis tools for verilog and VHDL
with their webpack and web edition tools.
Icarus Verilog has a synthesis option I belive - that's an open source
verilog simulator. I've never used it but the project is very active,
I imagine it is use-able.
There are some academic open source tools available from UC Berkeley
if that is of interest - no verilog or VHDL though.
Chris

Post by Element Blue
Hi,
Sometime back there was a question asked regarding free synthesis
tools.I have the same question.Are there free synthesis tools,even with
any restrictions/evaluation periods/licenses,etc. for students ?
Thanks a lot
Bye

Ciao,

Try sis from UC Berkeley website. Search for "sis berkeley eecs" in
Google. Its open source academic tool. Comes with blif2vst and
vst2blif which I use to convert VHDL to BLIF. I do the processing and
use Formality to check the results. Works fine for me.

Regards,
Ashutosh